会社

TSMC Europe B.V

会社所在地

ドイツ-ミュンヘン

職種

研究開発

職種

エンジニア／管理者

雇用形態

正社員

投稿日

2026/07/02

Taiwan Semiconductor Manufacturing Company Ltd. (“TSMC”) is the world’s leading semiconductor foundry. Headquartered in Taiwan, the Company has operation facilities worldwide and the largest logic chip manufacturing capacity in global semiconductor industry. The Company employs a global workforce of over 89.000 and recorded revenue over US$122 billion in 2025. TSMC produces the chips that are found in smart phones, tablets, computers, smart TVs, cars, laptops, games consoles, data centers and many more applications. TSMC sells to a wide variety of customers, including most leading semiconductor companies.

At the TSMC EU Design Center, you’ll work in an exceptional technology and design team to refine your technical and leadership skills within the world's most advanced design service ecosystem. You'll be contributing to the forefront of semiconductor technology, including cutting-edge nonvolatile memory solutions like MRAM and RRAM. Your main focus will be to assist our leading customers in delivering state-of-the-art products that have a transformative impact on people's lives.

職務内容

• DFT Architecture & Leadership: Define, architect, and document the complete DFT strategy for complex SoC. Lead and mentor a team of DFT engineers throughout the project lifecycle.

• Flow Development: Design, implement, and maintain DFT flows utilizing Synopsys (DFTMAX, TetraMAX, PrimeShield) and Siemens Tessent (Tessent Shell, TestKompress) toolsets.

• iJTAG Integration: Serve as the internal expert on iJTAG (IEEE 1687). Architect and implement hierarchical iJTAG networks, instrument connectivity, and ICL/PDL description generation for IP block integration.

• Implementation: Drive the insertion of Scan, MBIST (Memory Built-In Self-Test), LBIST, and Analog Macro test structures.

• ATPG & Verification: Generate and validate high-quality ATPG patterns (stuck-at, transition fault, path delay, and cell-aware). Perform extensive pre-silicon DFT verification at both block and full-chip levels using gate-level simulations (GLS) with timing.

• Physical Design Collaboration: Work closely with the Synthesis and Physical Design teams to resolve DFT-related timing closure, routing congestion, and power issues.

• Silicon Bring-up & Diagnostics: Lead post-silicon validation, ATE (Automatic Test Equipment) deployment, and debug activities to diagnose yield issues and silicon failures.

職務資格

• Master's degree or above in Electrical Engineering or any other related majors.

• Over 5 years of experience of hands-on experience with DFT and test flow with commercial EDA tools for large and complex SOCs.

• Strong fundamental knowledge of DFT techniques include JTAG, ATPG, yield learning, logic diagnosis, Scan compression, IEEE 1500 Std. and MBIST.

• Experience with Synopsys DFT Complier, Tetramax and VCS is required. Experience with Tessent and Modus/Encounter tool suite is a plus.

• Strong programming skills in Python/TCL and shell scripting is required.

TSMC 価値観

TSMCは、私たちのビジョンと価値観に共感していただき、会社の持続的な成功に貢献していただける仲間を募集しています。私たちのコアバリューは、企業文化を形成する礎であり、すべての決断や行動の指針であります。以下のプリンシプルに心が響き、業務に体現していただける応募者を心よりお待ちしています。 

• 誠実さ： 私たちは事実のみを語り、誇張や虚飾はしません。私たちは軽率に約束することはありません。一度約束したら、全力を尽くして守ります。
• コミットメント：コミットメントは社員と会社の間に存在する双方向性です。社員は会社に対してロイヤリティを持ち、会社の成功は自分の成功であると心構え、勤勉に働いてベストを尽くします。一方で、会社は社員の利益を最大限に考慮するよう尽力します。 
• イノベーション： イノベーションは会社成長の源泉です。新しいアイデアを発想することに留まらず、そのアイデアを実践するこそがイノベーションです。 
• お客様の信頼：私たちは、お客様と深く永続的なパートナーシップを築くことに尽力します。長期にわたり、お客様の成功を支える、頼れるパートナーであり続けます。

 (TSMCのコアバリューに関する詳細は、こちらをご参照ください：https://www.tsmc.com/japanese/aboutTSMC/values)

It is the policy of TSMC EU to provide equal employment opportunity (EEO) to all persons regardless of age, color, ethnic and national origin, citizenship status, physical or mental disability, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, genetic information, marital status, status with regard to public assistance, veteran status, or any other characteristic protected by federal, state or local law.