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TSMC Europe B.V
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Deutschland-München
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Ingenieur / Verwaltung
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Regulär
Veröffentlicht
02.07.2026
Taiwan Semiconductor Manufacturing Company Ltd. (“TSMC”) is the world’s leading semiconductor foundry. Headquartered in Taiwan, the Company has operation facilities worldwide and the largest logic chip manufacturing capacity in global semiconductor industry. The Company employs a global workforce of over 89.000 and recorded revenue over US$122 billion in 2025. TSMC produces the chips that are found in smart phones, tablets, computers, smart TVs, cars, laptops, games consoles, data centers and many more applications. TSMC sells to a wide variety of customers, including most leading semiconductor companies.
At the TSMC EU Design Center, you’ll work in an exceptional technology and design team to refine your technical and leadership skills within the world's most advanced design service ecosystem. You'll be contributing to the forefront of semiconductor technology, including cutting-edge nonvolatile memory solutions like MRAM and RRAM. Your main focus will be to assist our leading customers in delivering state-of-the-art products that have a transformative impact on people's lives.
Zuständigkeiten
• DFT Architecture & Leadership: Define, architect, and document the complete DFT strategy for complex SoC. Lead and mentor a team of DFT engineers throughout the project lifecycle.
• Flow Development: Design, implement, and maintain DFT flows utilizing Synopsys (DFTMAX, TetraMAX, PrimeShield) and Siemens Tessent (Tessent Shell, TestKompress) toolsets.
• iJTAG Integration: Serve as the internal expert on iJTAG (IEEE 1687). Architect and implement hierarchical iJTAG networks, instrument connectivity, and ICL/PDL description generation for IP block integration.
• Implementation: Drive the insertion of Scan, MBIST (Memory Built-In Self-Test), LBIST, and Analog Macro test structures.
• ATPG & Verification: Generate and validate high-quality ATPG patterns (stuck-at, transition fault, path delay, and cell-aware). Perform extensive pre-silicon DFT verification at both block and full-chip levels using gate-level simulations (GLS) with timing.
• Physical Design Collaboration: Work closely with the Synthesis and Physical Design teams to resolve DFT-related timing closure, routing congestion, and power issues.
• Silicon Bring-up & Diagnostics: Lead post-silicon validation, ATE (Automatic Test Equipment) deployment, and debug activities to diagnose yield issues and silicon failures.
Qualifikationen
• Master's degree or above in Electrical Engineering or any other related majors.
• Over 5 years of experience of hands-on experience with DFT and test flow with commercial EDA tools for large and complex SOCs.
• Strong fundamental knowledge of DFT techniques include JTAG, ATPG, yield learning, logic diagnosis, Scan compression, IEEE 1500 Std. and MBIST.
• Experience with Synopsys DFT Complier, Tetramax and VCS is required. Experience with Tessent and Modus/Encounter tool suite is a plus.
• Strong programming skills in Python/TCL and shell scripting is required.
TSMC Core Values
At TSMC, we invite talented individuals who share our vision and values to contribute to our continued success. Our core values are the foundation of our culture, guiding every decision and action. We seek applicants who deeply resonate with these principles and embody them in their work: 
  • Integrity: Tell the truth. We do not brag. We do not make commitments lightly. Once we make a commitment, we devote ourselves completely to meeting that commitment.
  • Commitment: Employees are dedicated to the company, view the company’s success as their own and work diligently to make their best contributions. As commitment is mutual, the Company strives to serve the best interests of its employees. 
  • Innovation: Innovation is the wellspring of the Company's growth. It means more than new ideas; it means putting ideas into practice. 
  • Customer Trust: We strive to build deep and enduring relationships with our customers, who trust and rely on us to be part of their success over the long term.
 (For more details on TSMC’s Core Values, please visit:https://www.tsmc.com/english/aboutTSMC/values)
It is the policy of TSMC EU to provide equal employment opportunity (EEO) to all persons regardless of age, color, ethnic and national origin, citizenship status, physical or mental disability, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, genetic information, marital status, status with regard to public assistance, veteran status, or any other characteristic protected by federal, state or local law.