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公司名稱
TSMC Japan 3DIC R&D Center, Inc.
工作地點
日本-筑波市
職務張貼日
2024/05/17

Role

Manage substrate design rules for internal/external(customer) design guidance
Lead supplier DFM (design for manufacturing) review, identify the gaps and align with various teams to come up with a final design for yield/reliability optimization
Collaborate with the internal simulation team to define/proceed thermomechanical and electrical simulation (signal/power integrity) needs of each new tape-out. Provide a summary of design hot spots for layout modification reference
Drive DFM efficiency improvement: simplify review flow or develop a new methodology
Support substrate development engineer to lead supplier engineering meetings

 

Qualifications

5 years+ experience with packaging substrate industry
Familiar with substrate design rules and design tools
Knowledgeable of substrate design and correlation to physical/electrical performances
Bac./Master/Ph.D. in Materials Science, Mech./Chem. Eng. or related Eng. field

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