公司名稱

TSMC Design Tech. Japan, Inc.

工作地點

日本-橫濱市

職務張貼日

2022/05/12

Job Description:

RDR design rules optimization.
- Develop Standard Cell/IO Library Memory and Analog IPs in advanced technology.
- Develop Memory IPs, Compiler and Test Vehicle.
- Develop Standard Cell/IO Library and Analog. IPs
- Provide design rules trade-off on area and performance.
- Find layout solution for Standard Cell/IO Library Memory and Analog IPs to reduce RDR impact on area.

 

Qualifications:

- BCH and above degree in EE or Engineering related field with 3+ years of working experiences.
- Expertise on std. Cell, SRAM, IO and analog layout and familiar with customers usage on those IPs.
- Layout expertise of SRAM (first priority), Standard cell, IO, Analog, Process with Virtuoso and Device background will be a plus.
- Highly welcome candidates who have less custom layout experience but have good related design experience, working attitude and are self-motivated.
- Good command of Japanese.
- Be able to communicate with customer in English is a plus.

TSMC 企業核心價值

台積公司誠摯招募志同道合的夥伴，與我們一同驅動企業邁向成功。我們深信，核心價值是我們企業文化的基石。因此，應徵者必須認同核心價值，並積極地落實在工作中。 

• 誠信正直： 說真話、不誇張、不作秀。一旦答應，必定不計代價，全力以赴。
• 承諾： 同仁全心全意投入公司，抱著「公司成功、我也成功」的心情，熱忱認真地工作，並且做出最大貢獻。因為承諾是雙向的，公司也會為照顧員工權益全力以赴。 
• 創新：創新是公司成長的泉源，不僅僅是有新的想法，還要執行力，做出改變。 
• 客戶信任： 我們努力與客戶建立深遠的夥伴關係，並成為客戶信賴且賴以成功的長期重要夥伴。

 ( TSMC 核心價值詳細資訊請參考：https://www.tsmc.com/chinese/aboutTSMC/values)