Job Description

Software implementation, testing and deployment of digital design flow based on requirements from each design stage (flow framework, design database, library management, circuit construction, physical and electrical sign-off, etc.) domain experts to support advanced large-scale SoC or 3DIC testchip projects.

■Qualification

1. Can do hands-on work is a must. 
2. Fluent English communication is a must.
3. MS or Ph.D in electrical engineering or computer science related fields preferred.
4. Familiar with TCL / Python / C++ programming, with good understanding of runtime complexity analysis and data structures preferred.
5. Experience with Cadence’s Innvous / Tempus / Voltus, Synopsys’s Fusion Compiler / PrimeTime / IC-Validator, ANSYS’s Redhawk, Mentor Graphic’s Calibre is a plus.
6. Advanced process (16nm and below) project tapeout experience is a plus."