We are seeking a highly motivated and experienced DFT engineer to join our team.
Key responsibilities:
1. Analyze circuit behavior with STA
2. Analyze DFT architecture and strategies
3. Provide technical support and guidance to the team
Required Qualifications:
1. Familiar with Static Timing Analysis, able to independently analyze critical paths and their causes in design.
2. Familiar with ATPG, able to generate corresponding test patterns for various types of defects, stuck-at faults, transition delay fault, small delay faults, etc.
3. Familiar with Design for Test architecture, understanding of scan compression architecture
Preferred Qualifications:
1. Experience in silicon diagnosis
2. Familiar with Python or TCL or shell scripting
3. Circuit design experience
4. Familiar with IEEE1149.1, 1500, 1687, 1838
Diversity, Equity and Inclusion (DE&I) reflects TSMC’s core values and business philosophy and is essential for our future success. Our commitment to DE&I allows us to create an environment where every employee, regardless of gender, age, disability, religion, race, ethnicity, nationality, political affiliation, or sexual orientation, can bring their unique perspective and experiences to work, enabling us to drive profitability, increase productivity, and unleash innovation. To strive to create a workplace that is equitable and accessible to all employees, we also provide reasonable accommodations for qualified individuals with disabilities. We are committed to fostering an inclusive culture where every employee feels valued and empowered to contribute to our mission and provide excellent service to our global customers.