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公司名稱
歐洲子公司
工作地點
德國-慕尼黑
專業領域
研究發展
職別
工程師/管理師
職務類型
正職
職務張貼日
2026/07/16
Taiwan Semiconductor Manufacturing Company Ltd. (“TSMC”) is the world’s leading semiconductor foundry. Headquartered in Taiwan, the Company has operation facilities worldwide and the largest logic chip manufacturing capacity in global semiconductor industry. The Company employs a global workforce of over 89.000 and recorded revenue over US$122 billion in 2025. TSMC produces the chips that are found in smart phones, tablets, computers, smart TVs, cars, laptops, games consoles, data centers and many more applications. TSMC sells to a wide variety of customers, including most leading semiconductor companies.
At the TSMC EU Design Center, you’ll work in an exceptional technology and design team to refine your technical and leadership skills within the world's most advanced design service ecosystem. You'll be contributing to the forefront of semiconductor technology, including cutting-edge nonvolatile memory solutions like MRAM and RRAM. Your main focus will be to assist our leading customers in delivering state-of-the-art products that have a transformative impact on people's lives.
職務說明
IP Design Flow & Methodology Development:

1. Design, build, and support unified front-to-back design flows for mixed-signal IP development, bridging analog schematic/layout environments with digital implementation environments
2. Define and enforce best practices for IP reuse, modularity, and multi-process node portability

Mixed-Signal Verification & Modeling:

1. Establish robust Analog/Mixed-Signal (AMS) verification methodologies to enable automated, top-level co-simulations
2. Standardize and automate the generation of high-quality behavioral models to enable early system-level simulations for IP consumers

Interface Timing & Sign-Off:

1. Define methodologies for timing closure across analog-digital IP interfaces, including Static Timing Analysis (STA) on mixed-signal boundaries and constraint generation
2. Build and automate physical verification sign-off flows (DRC/LVS/PEX, EM/IR drop, and reliability analysis) tailored for IP integration

CAD Automation & Scripting:

1. Develop and maintain robust automation scripts (Python, Tcl, SKILL, Perl) to minimize human error, automate repetitive design tasks, and accelerate regression testing

IP Packaging & Release Management:

1. Define standard IP delivery packages (including Liberty files/lib, LEF/GDS, CDL, behavioral models, and integration guidelines)
2. Manage design data, workspaces, and IP version control utilizing configuration management systems
職務要求
  • Education: Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
  • Experience: 10+ years of experience in CAD, design methodology, or IP development (analog, digital, or mixed-signal).
  • Mixed-Signal Flow Expertise: Strong hands-on experience with industry-standard EDA environments.
  • Analog/Custom: Cadence Virtuoso (ADE, Spectre), Synopsys Custom Compiler.
  • Digital Front/Back-End: Synopsys Design Compiler/PrimeTime, Cadence Genus/Innovus.
  • Mixed-Signal Verification: Cadence Xcelium/AMS Designer, Synopsys VCS/XA.
  • Scripting Skills: Proficiency in scripting languages used in modern EDA flows (Tcl, Python, SKILL, Shell scripting).
  • IP-Specific Knowledge: Deep understanding of IP packaging, process design kits (PDKs), physical extraction (PEX/EM/IR), and boundary timing constraints.
TSMC 企業核心價值
台積公司誠摯招募志同道合的夥伴，與我們一同驅動企業邁向成功。我們深信，核心價值是我們企業文化的基石。因此，應徵者必須認同核心價值，並積極地落實在工作中。 
  • 誠信正直： 說真話、不誇張、不作秀。一旦答應，必定不計代價，全力以赴。
  • 承諾： 同仁全心全意投入公司，抱著「公司成功、我也成功」的心情，熱忱認真地工作，並且做出最大貢獻。因為承諾是雙向的，公司也會為照顧員工權益全力以赴。 
  • 創新：創新是公司成長的泉源，不僅僅是有新的想法，還要執行力，做出改變。 
  • 客戶信任： 我們努力與客戶建立深遠的夥伴關係，並成為客戶信賴且賴以成功的長期重要夥伴。
 ( TSMC 核心價值詳細資訊請參考：https://www.tsmc.com/chinese/aboutTSMC/values)
It is the policy of TSMC EU to provide equal employment opportunity (EEO) to all persons regardless of age, color, ethnic and national origin, citizenship status, physical or mental disability, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, genetic information, marital status, status with regard to public assistance, veteran status, or any other characteristic protected by federal, state or local law.