Overview of Role 

As a Physical Design Engineer, you will be responsible for the physical implementation of the test vehicles on TSMC’s most advanced process nodes. You will be reporting to the Manager of our Test Chip Physical Implementation team at our San Jose Design Center in San Jose, CA. Come join a team of engineers dedicated to pushing the envelope for the world’s leading semiconductor company. We are currently operating in a hybrid work schedule with 4 days in office. 

Responsibilities 

• Responsible for the physical implementation and tapeout of the test vehicles on TSMC’s most advanced process nodes, N3, N2 and beyond.

• Perform the jobs or tasks listed below, but not limited:

• Physical implementation with netlist2GDS flow including block/SOC level floorplan, low power structure, power ground network, placement, clock tree synthesis, routing, design optimization.

• Design signoff verification including RC extraction, STA, IREM, DRC, LVS, ERC, VCLP.

• Timing closure, physical design closure, power/signal integrity closure based on the result of signoff verification.

• Development and evaluation of the methodology and flow to achieve PPA target, power, performance and area. 

• CAD development to support design flow and quality monitoring dashboard with TCLK/TK, CSH, Python.

Minimum Qualifications 

• Master’s Degree or above in Electrical Engineering or Computer Science from a top university, VLSI related course & Project preferred. 

• Strong understanding of digital circuit concepts.

• Knowledge on physical design implementation flow, auto placement and route, static timing analysis, layout design, physical verification, IREM signoff, cad development.

• Familiarity with CAD tools for layout, simulation, and verification

• Familiarity in scripting languages such as TCL, Python, CSH.

Preferred Qualifications 

• Good communication skills and strong problem-solving skills

• Positive, Active, Collaborative, Self-motivated, Adaptable and Flexible

• Strong ability to manage demands in a fast-paced environment and diverse cultural style

• Hands on experience with major EDA Tools including but not limited to Primetime, Innovus, Fusion Compiler, Calibre.

• DFT knowledge is a plus.

Company Description 

As a trusted technology and capacity provider, TSMC is driven by the desire to be:

• The world’s leading dedicated semiconductor foundry

• The technology leader with a strong reputation for manufacturing excellence

• Advancing semiconductor manufacturing innovations to enable the future of technology

TSMC pioneered the pure-play foundry business model when it was founded in 1987 and has been the world’s leading dedicated semiconductor foundry ever since. The Company supports a thriving ecosystem of global customers and partners with the industry’s leading process technologies and a portfolio of design enablement solutions to unleash innovation for the global semiconductor industry. With global operations spanning Asia, Europe, and North America, TSMC serves as a committed corporate citizen around the world. 

In North America, TSMC has a strong sales and service organization that works with customers by helping them achieve silicon success with cutting-edge technologies and manufacturing excellence. The Company has continued to accelerate its R&D investment and staffing in recent years and is expanding its manufacturing footprint to support customer innovation with 3D IC technologies and optimal manufacturing capacity.

For positions requiring access to technical data subject to export control regulations, including Export Administration Regulations, TSMC North America may have to obtain export licensing approval from the U.S. Government for certain individuals.  All employment is contingent upon TSMC North America obtaining any export license or other approval that may be required by the U.S. Government.

Diversity statement 

TSMC Technology, Inc. is committed to employing a diverse workforce and provides Equal Employment Opportunity for all individuals regardless of race, color, religion, gender, age, national origin, marital status, sexual orientation, gender identity, status as a protected veteran, genetic information, or any other characteristic protected by applicable law.

TSMC is an equal opportunity employer prizing diversity and inclusion. We are committed to treating all employees and applicants for employment with respect and dignity. If you require reasonable accommodation due to a disability during the application or the recruiting process, please feel free to notify us at g_accommodations@tsmc.com. TSMC confirms to all applicants its commitment to meet TSMC’s obligations under applicable employment law. Reasonable accommodations will be determined on a case-by-case basis. 

Pay Transparency / Benefits statement 

At TSMC, your base pay is only part of your overall total compensation package. At the time of this posting, this role typically pays a base salary between $88,000 and $140,000 per year. The range displayed reflects the minimum and maximum target for new hires. Actual pay may be more or less than the posted range. Factors that influence pay include the individual's skills, qualifications, education, experience and the position level and location.  TSMC’s total compensation package consists of market competitive pay, allowances, bonuses, and comprehensive benefits. We also offer extensive development opportunities and programs.