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工作地點
台灣
專業領域
IC 設計技術
職別
工程師/管理師
職務類型
正職
職務張貼日
2024/03/26
職務說明

We are seeking a highly motivated and experienced DFT engineer to join our team.


Key responsibilities:


1. Analyze circuit behavior with STA

2. Analyze DFT architecture and strategies

3. Provide technical support and guidance to the team

職務要求

Required Qualifications:


1. Familiar with Static Timing Analysis, able to independently analyze critical paths and their causes in design.

2. Familiar with ATPG, able to generate corresponding test patterns for various types of defects, stuck-at faults, transition delay fault, small delay faults, etc.

3. Familiar with Design for Test architecture, understanding of scan compression architecture

At least 7 years of experience in the relevant field mentioned above.

 

Preferred Qualifications:


1. Experience in silicon diagnosis

2. Familiar with Python or TCL or shell scripting

3. Circuit design experience

4. Familiar with IEEE1149.1, 1500, 1687, 1838