会社

TSMC Europe B.V

会社所在地

ドイツ-ミュンヘン

職種

ICデザイン技術

職種

エンジニア／管理者

雇用形態

正社員

投稿日

2026/05/11

Taiwan Semiconductor Manufacturing Company Ltd. (“TSMC”) is the world’s leading semiconductor foundry. Headquartered in Taiwan, the Company has operation facilities worldwide and the largest logic chip manufacturing capacity in global semiconductor industry. The Company employs a global workforce of over 89.000 and recorded revenue over US$122 billion in 2025. TSMC produces the chips that are found in smart phones, tablets, computers, smart TVs, cars, laptops, games consoles, data centers and many more applications. TSMC sells to a wide variety of customers, including most leading semiconductor companies.

At the TSMC EU Design Center, you’ll work in an exceptional technology and design team to refine your technical and leadership skills within the world's most advanced design service ecosystem. You'll be contributing to the forefront of semiconductor technology, including cutting-edge nonvolatile memory solutions like MRAM and RRAM. Your main focus will be to assist our leading customers in delivering state-of-the-art products that have a transformative impact on people's lives.

職務内容

As part of the hardware development team for embedded memories you develop IPs that will power future products of our customers. In this role you:

1. Define, explore, and document micro-architecture of RTL designs based on given requirements and specified architecture.

2. Implement the design micro-architecture using synthesizable Verilog or System Verilog according to coding guidelines.

3. Support the complete RTL to GDS flow, ensuring design constraints and feasibility of implementation.

• Utilize at least one linting tool.

• Collaborate with the P&R team to specify SDC for synthesis and P&R.

• Perform logic synthesis, LEC (Logic Equivalency Checking) and STA analysis.

4. Develop, document, and execute verification plan using Verilog, System Verilog and preferably UVM.

5. Utilize industry-standard EDA tools, such as Synopsys, Cadence, or Mentor Graphics.

6. Debug and resolve complex design issues, including timing, power, and area optimization.

7. Collaborate with experienced architects and product engineering team to assess feasibility of ideas and create new ones.

8. (Optional but advantageous) Contribute to methodology improvements enhancing flow automation and efficiency by means of scripting or evaluation and utilization of AI powered tools.

職務資格

1. Master's degree or above in Electrical Engineering or any related majors.

2. More than 5 years of non-volatile memory (flash memory, RRAM, MRAM, PCRAM) circuit or logic design experience.

3. Familiar with EDA tools and design methodology for custom design or digital design of non-volatile memory.

Only the applications relevant to the criteria above will be taken for further consideration.

#LI-DNI

It is the policy of TSMC EU to provide equal employment opportunity (EEO) to all persons regardless of age, color, ethnic and national origin, citizenship status, physical or mental disability, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, genetic information, marital status, status with regard to public assistance, veteran status, or any other characteristic protected by federal, state or local law.