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Company
Taiwan Semiconductor Manufacturing Company Limited, TSMC
Location
Taiwan
Job Category
Manufacturing (fabs)
Job Type
Engineer / Admin
Employment Type
Regular
Posted
Sep 16, 2024
Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2023, the company served 528 customers with 11,895 products for high performance computing, smartphones, IoT, automotive, and consumer electronics, and is the world’s largest provider of logic ICs with annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and its ESMC subsidiary plans to begin construction on a fab in Germany in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade.
Job Responsibilities
TSMC’s advanced packaging process is an efficient and high-density packaging technology that mainly targets the demand for high-performance semiconductor components, including microprocessors, graphics processors, artificial intelligence chips, and more. This technology uses advanced 3D stacking to vertically stack multiple chips and uses high-density packaging materials to fix them together.

This technology can improve the performance of components, reduce power consumption, decrease package size, and increase system integration. TSMC’s packaging process includes various technologies such as CoWoS and InFO. Among them, CoWoS is a technology that connects different chips through copper wires using silicon interconnect technology to achieve high-frequency and high-speed data transmission. InFO technology directly encapsulates chips on the substrate, connecting chips and substrates through tiny copper wires, achieving a more compact and efficient packaging solution.

TSMC’s advanced packaging process can improve chip performance and production efficiency, meeting the packaging technology requirements of modern high-performance electronic products such as smartphones, artificial intelligence, high-performance computing, and other fields. 

TSMC’s advanced packaging organization includes Testing R&D Engineers who conduct exploratory research in DFT test architecture, evaluate next-gen test technology for several devices (logic SOC, HPC, AP, RF, etc.), which use 3D silicon stacking and advanced packaging technologies, and closely collaborate with international customers from new product introduction to mass production.
Job Qualifications
1. Bachelor’s degree or above in Electrical/Electronic Engineering, Computer Engineering, Communication, Optical Electronics, or related fields.
2. Solid technical understanding of semiconductor testing concepts.
3. Familiarity with programming languages.
4. Hands-on participation and a strong sense of ownership.
5. Fluent in English and exhibiting good communication skills to work within cross-functional teams.

Diversity, Equity and Inclusion (DE&I) reflects TSMC’s core values and business philosophy and is essential for our future success. Our commitment to DE&I allows us to create an environment where every employee, regardless of gender, age, disability, religion, race, ethnicity, nationality, political affiliation, or sexual orientation, can bring their unique perspective and experiences to work, enabling us to drive profitability, increase productivity, and unleash innovation. To strive to create a workplace that is equitable and accessible to all employees, we also provide reasonable accommodations for qualified individuals with disabilities. We are committed to fostering an inclusive culture where every employee feels valued and empowered to contribute to our mission and provide excellent service to our global customers.